AMD targets AI workloads with Venice server CPU design

AMD is positioning its upcoming Venice server CPU as a customer-outcome-focused design, aiming to defend its market lead against Nvidia's Vera chip for agentic AI workloads, as announced at a Las Vegas conference. The new Zen 6C microarchitecture features improved core density, distributed schedulers, and lower-latency operating points. AMD executives emphasized meeting diverse customer needs across EDA, CRM, and HPC workloads, while still citing performance gains like 2.8x more agents supported versus competition. The push follows AMD's earlier benchmark controversy with InferenceX, prompting a shift toward system-level results. Executives highlighted Venice's power efficiency, with nearly 3x agents per watt, and its 512-thread capacity, positioning it as a portfolio solution for agentic AI.