AMD Reveals Zen 6 and Zen 6c Architecture: Up to 31% Faster Than Zen 5

AMD unveiled the internal architecture of its Zen 6 and Zen 6c cores at its "AMD in Depth" technical briefing, revealing an average performance improvement of 20 to 31 percent over the previous Zen 5/5c generation. The two core variants share a common architecture, differing only in physical implementation, with unified 4MB L3 cache per core. Enhancements include expanded instruction supply, branch prediction, schedulers, registers, and a larger reorder buffer, while maintaining the same execution unit count. The new design features a 9-wide op cache and increased scheduler capacity, though peak theoretical performance remains unchanged from Zen 5. The 3D V-Cache layout for the EPYC 9006X appears to place the cache die atop the CPU die, a shift from the previous generation's approach.