Seoul National University researchers roadmap next-generation 2D semiconductor gate stack technology

Seoul National University researchers have published a roadmap for next-generation 2D semiconductor gate stack technology, crucial for future transistors. The roadmap categorizes integration methods and benchmarks them against performance metrics, addressing key challenges like interface quality and leakage current for commercialization. This work provides a blueprint for developing ultra-low-power, high-performance transistors, potentially driving advancements in AI and mobile chip technology.